As the semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower costs, challenges from both fabrication and design issues have resulted in the development of more dense arrangements of metal wirings and vias connecting upper and lower wirings. In particular, as the dimensions of the vias and metal wirings become smaller, a contact resistance becomes higher, and an electro migration issues become more severe. Accordingly, what are needed are an improved device and a method for fabricating a high density via and metal wiring structures.